Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 33 ELECTRICAL SPECIFICATIONS
R01UH0042EJ0500 Rev.5.00 Page 1432 of 1513
Aug 12, 2011
(3) Timer timing
(T
A = −40 to +85°C, VDD = EVDD = UVDD = AVREF0 = AVREF1, VSS = AVSS = 0 V, CL = 50 pF)
Parameter Symbol Conditions MIN. MAX. Unit
TAB00 to TAB03,TAB10 to TAB13,
EVTAB1, TRGAB1
12T + 20 ns TI high-level width tTIH
TIAA00, TIAA01, TIAA10, TIAA11,
TIAA20, TIAA21, TIAA30, TIAA31,
TIAA50, TIAA51,
3T
SMP1 + 20 ns
TAB00 to TAB03, TAB10 to TAB13,
EVTAB1, TRGAB1
12T + 20 ns TI low-level width tTIL
TIAA00, TIAA01, TIAA10, TIAA11,
TIAA20, TIAA21, TIAA30, TIAA31,
TIAA50, TIAA51,
3T
SMP1 + 20 ns
TENCn high-level width tWENCHn n = 0, 1 3TSMP2 + 20 ns
TENCn low-level width tWENCLn n = 0, 1 3TSMP2 + 20 ns
TECR0 high-level width tWCRH0 3TSMP2 + 20 ns
TECR0 low-level width tWCRL0 3TSMP2 + 20 ns
TITn high-level width tWTITHn n = 0, 1 3TSMP2 + 20 ns
TITn low-level width tWTITLn n = 0, 1 3TSMP2 + 20 ns
EVTT0 high-level width tWTITH0 3TSMP2 + 20 ns
EVTT0 low-level width tWTITL0 3TSMP2 + 20 ns
TENCn input time difference tPHUD n = 0, 1 3TSMP2 + 20 ns
Remarks 1. T = 1/fXX
2. T
SMP1: Set by the noise elimination control register (TANFC). Selectable from fXX and fXX/4.
3. TSMP2: Set by the noise elimination control register (TTNFC). Selectable from fXX/4, fXX/8, fXX/16, fXX/32, and
f
XX/64.
4. The specifications above show the pulse widths that can be accurately detected as valid edges. Therefore,
even if a pulse width less than the above specifications is input, it may be detected as a valid edge.
TIn (input)
<t
WTIHn >/<t WTITHn ><t WTILn >/<t WTITLn >
TENC00 (input)
<t
WUDH00 ><t WUDL00 >
TENC01 (input)
<t
WUDH01 ><t WUDL01 >
<t PHUD >
TECR0 (input)
<t
WTCH0 ><t WTCL0 >