Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 33 ELECTRICAL SPECIFICATIONS

R01UH0042EJ0500 Rev.5.00 Page 1429 of 1513

Aug 12, 2011

(b) CLKOUT synchronous

A = −40 to +85°C, VDD = EVDD = UVDD = AVREF0 = AVREF1, VSS = AVSS = 0 V, CL = 50 pF)

Parameter Symbol Conditions MIN. MAX. Unit

HLDRQ setup time (to CLKOUT↓) tSHQK <50> 16 ns

HLDRQ hold time (from CLKOUT↓) tHKHQ <51> 0 ns

Delay time from CLKOUT↑ to bus float tDKF <52> 15 ns

Delay time from CLKOUT↑ to HLDAK↓ tDKHA1 <53> 1 15 ns

Delay time from CLKOUT↑ to HLDAK↑ tDKHA2 <54> 1 15 ns

Delay time from CLKOUT↑ to data output tDKBO <55> 1 17 ns

Remark The values in the above specifications are values for when clocks with a 1:1 duty ratio are input from X1.

Bus Hold (CLKOUT Synchronous)

CLKOUT (output)

HLDRQ (input)

HLDAK (output)

Address bus (output)

Data bus (I/O)

TH TH THT2 T3 TI TI

Hi-Z

CS0, CS2,

CS3 (output)

Hi-Z

ASTB (output)

RD (output),

WR0, WR1 (output)

Hi-Z

<50>

<54>

<55>

<53>

<51>

<52>