Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 33 ELECTRICAL SPECIFICATIONS
R01UH0042EJ0500 Rev.5.00 Page 1411 of 1513
Aug 12, 2011
33.2 Capacitance
(T
A = 25°C, VDD = EVDD = UVDD = AVREF0 = AVREF1, VSS = AVSS = 0 V)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
I/O capacitance CIO fX = 1 MHz
Measured pins returned to 0 V
10 pF
33.3 Operating Conditions
(T
A = −40 to +85°C, VDD = EVDD = UVDD = AVREF0 = AVREF1, VSS = AVSS = 0 V, CL = 50 pF)
Supply voltage Internal System Clock Frequency Conditions
V
DD EVDD UVDD AVREF0,
AV
REF1
Unit
C = 4.7 μ F,
A/D converter stopped,
D/A converter stopped,
USB stopped
2.85 to 3.6 2.85 to 3.6 2.85 to 3.6 2.85 to 3.6 V fXX = 3 to 6 MHz (during clock-
through operation)
f
XX = 24 to 48 MHz (during PLL
operation)
C = 4.7
μ F,
A/D converter operating,
D/A converter operating,
USB operating
3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 3.0 to 3.6 V
fXT = 32.768 kHz C = 4.7 μ F,
Note
2.85 to 3.6 2.85 to 3.6 2.85 to 3.6 2.85 to 3.6 V
Note When the system is operating on the subclock (fXT = 32.768 kHz), the A/D converter, D/A converter, and USB
controller do not operate.