Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 32 ON-CHIP DEBUG FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1399 of 1513
Aug 12, 2011
Figure 32-4. Memory Spaces Where Debug Monitor Programs Are Allocated
CSI0/UART receive
interrupt vector (4 bytes)
Reset vector
(4 bytes)
Interrupt vector for debugging
(4 bytes)
(2 KB)
Security ID area
(10 bytes)
: Debugging area
Note 1
0000060H
0000400H
Note 2
0000070H
0000000H
Internal ROM
(16 bytes)
3FFEFFFH
3FFEFF0H
Access-prohibited area
Internal RAM
Internal ROM
area
Note 3
Internal RAM
area
Notes 1. Address values vary depending on the product.
Internal ROM Size Address Value
μ PD70F3760, 70F3765, 70F3770, 70F3771 256 KB 003F800H to 003FFFFH
μ PD70F3761, 70F3766 384 KB 005F800H to 003FFFFH
μ PD70F3762, 70F3767 512 KB 007F800H to 007FFFFH
2. This is the address when CSIF0 is used. It starts at 0000406H when CSIF3 is used, and at
00004A0H when UARTC0 is used.
3. Address values vary depending on the product.
Internal RAM Size Address Value
μ PD70F3760, 70F3765, 70F3770, 70F3771 32 KB 3FF7000H
μ PD70F3761, 70F3766 40 KB 3FF5000H
μ PD70F3762, 70F3767 48 KB 3FF3000H