Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 28 LOW-VOLTAGE DETECTOR (LVI)
R01UH0042EJ0500 Rev.5.00 Page 1346 of 1513
Aug 12, 2011
28.4.2 To use for interrupt
<To start operation>
<1> Mask the interrupt of LVI.
<2> Set the LVIM.LVION bit to 1 (to enable operation).
<3> Insert a wait cycle of 0.2 ms (max.) or more by software.
<4> By using the LVIM.LVIF bit, check if the supply voltage > detected voltage.
<5> Clear the interrupt request flag of LVI.
<6> Unmask the interrupt of LVI.
<To stop operation>
Clear the LVION bit to 0.
Figure 28-3. Operation Timing of Low-Voltage Detector (LVIMD Bit = 0)
External RESET IC
detected voltage
RESET pin
INTLVI signal
Supply voltage (V DD )
LVI detected voltage
(2.95 V (TYP.))
LVION bit
LVI detected signal
Internal reset signal
(active low)
Delay
Clear
Delay
Time
Delay
Note
Note Since the LVION bit is the initial value (operation disabled) due to the external reset input, no INTLVI
interrupts occur.
Caution When the INTLVI signal is generated, confirm, using the LVIM.LVIF bit, whether the INTLVI
signal is generated due to a supply voltage drop or rise across the detected voltage.