Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 26 RESET FUNCTIONS
R01UH0042EJ0500 Rev.5.00 Page 1331 of 1513
Aug 12, 2011
Figure 26-2. Timing of Reset Operation by RESET Pin Input
Counting of oscillation
stabilization time
Initialized to f
XX /8 operation
Oscillation stabilization timer overflows
Internal system
reset signal
Analog delay
(eliminated as noise)
Analog delayAnalog delay
(eliminated as noise)
RESET
f
X
f CLK
Analog delay
Figure 26-3. Timing of Power-on Reset Operation
Oscillation stabilization
time count
Must be on-chip
regulator stabilization
time (1 ms (max.))
or longer.
Initialized to f
XX /8 operation
Overflow of timer for oscillation stabilization
Internal system
reset signal
RESET
f
X
V DD
f CLK
Analog delay