Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 25 STANDBY FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1325 of 1513
Aug 12, 2011
Table 25-10. Operating Status in Subclock Operation Mode
Operating Status Setting of Subclock Operation Mode
Item
When Main Clock Is Oscillating When Main Clock Is Stopped
Subclock oscillator (fXT) Oscillation enabled
Internal oscillator (fR) Oscillation enabled
PLL Operable Stops operation
Note 1
CPU Operable
DMA controller Operable
Interrupt controller Operable
TAA0 to TAA5 Operable Stops operation
TAB0, TAB1 Operable Stops operation
TMM0 to TMM3 Operable
Operable when f
R/8 or fXT is selected as
the count clock
Timer
TMT0
Real-time counter (RTC) Operable
Operable when f
XT is selected as the
count clock
Watchdog timer (WDT2) Operable
Operable when f
R or fXT is selected as the
count clock
CSIF0 to CSIF4 Operable
Operable when the SCKFn input clock is
selected as the count clock (n = 0 to 4)
I
2
C00 to I
2
C02 Operable Stops operation
Serial interface
UARTC0 to UARTC4 Operable
Stops operation (but UARTC0 is operable
when the ASCKC0 input clock is
selected)
A/D converter Operable Stops operation
D/A converter Operable
Real-time output function (RTO) Operable Stops operation (output held)
Key interrupt function (KR) Operable
CRC operation circuit Operable
External bus interface See CHAPTER 5 BUS CONTROL FUNCTION.
Port function Settable
Internal data Settable
CAN
Note 2
Operable Stops operation
USB function Operable Stops operation
Notes 1, Be sure to stop the PLL (PLLCTL.PLLON bit = 0) before stopping the main clock.
2.
μ PD70F3770, 70F3771 only
Caution When the CPU is operating on the subclock and main clock oscillation is stopped, accessing a
register in which a wait occurs is disabled. If a wait is generated, it can be released only by reset
(see 3.4.9 (2)).