Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 25 STANDBY FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1318 of 1513
Aug 12, 2011
Table 25-7. Operating Status in IDLE2 Mode
Operating Status Setting of IDLE2 Mode
Item
When Subclock Is Not Used When Subclock Is Used
Main clock oscillator (fX) Oscillation enabled
Subclock oscillator (fXT)
−
Oscillation enabled
Internal oscillator (fR) Oscillation enabled
PLL Stops operation
CPU Stops operation
DMA controller Stops operation
Interrupt controller Stops operation
TAA0 to TAA5 Stops operation
TAB0, TAB1 Stops operation
TMM0 to TMM3 Operable when fR/8 is selected as the
count clock
Operable when fR/8 or fXT is selected as
the count clock
Timer
TMT0 Stops operation
Real-time counter (RTC) Operable when fX (divided BRG) is
selected as the count clock
Operable
Watchdog timer (WDT2) Operable when fR is selected as the count
clock
Operable when fR or fXT is selected as the
count clock
CSIF0 to CSIF4 Operable when the SCKFn input clock is selected as the count clock (n = 0 to 4)
I
2
C00 to I
2
C02 Stops operation
Serial interface
UARTC0 to UARTC4 Stops operation (but UARTC0 is operable when the ASCKC0 input clock is selected)
A/D converter Holds operation (conversion result held)
Note 1
D/A converter Holds operation (output held
Note 1
)
Real-time output function (RTO) Stops operation (output held)
Key interrupt function (KR) Operable
CRC operation circuit Stops operation
External bus interface See CHAPTER 5 BUS CONTROL FUNCTION.
Port function Retains status before IDLE2 mode was set
Internal data The CPU registers, statuses, data, and all other internal data such as the contents of
the internal RAM are retained as they were before the IDLE2 mode was set.
CAN
Note 2
Stops operation
USB function Operable when the UCLK input is selected as the operation clock or when the PLL is
operating.
Note 1
Notes 1. To lower the power consumption, stop the A/D converter, D/A converter, and USB function controller before
shifting to the IDLE2 mode.
2.
μ PD70F3770, 70F3771 only