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ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller LQFP 100 32-Bit 48 MHz I/O number 77
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V850ES/JG3-H, V850ES/JH3-H CHAPTER 25 STANDBY FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1317 of 1513
Aug 12, 2011
25.5.2 Releasing IDLE2 mode
The IDLE2 mode is released by a non-maskable interrupt request signal (NMI pin input, INTWDT2 signal), unmasked
external interrupt request signal (INTP0 to INTP18 pin input), unmasked internal interrupt request signal from the
peripheral functions operable in the IDLE2 mode, or reset signal (reset by RESET pin input, WDT2RES signal, low-voltage
detector (LVI), or clock monitor (CLM)). The PLL returns to the operating status it was in before the IDLE2 mode was set.
After the IDLE2 mode has been released, the normal operation mode is restored.
(1) Releasing IDLE2 mode by non-maskable interrupt request signal or unmasked maskable interrupt request
signal
The IDLE2 mode is released by a non-maskable interrupt request signal or an unmasked maskable interrupt
request signal, regardless of the priority of the interrupt request signal. If the IDLE2 mode is set in an interrupt
servicing routine, however, an interrupt request signal that is issued later is processed as follows.
(a) If an interrupt request signal with a priority lower than that of the interrupt request currently being serviced is
issued, the IDLE2 mode is released, but that interrupt request signal is not acknowledged. The interrupt
request signal itself is retained.
(b) If an interrupt request signal with a priority higher than that of the interrupt request currently being serviced is
issued (including a non-maskable interrupt request signal), the IDLE2 mode is released and that interrupt
request signal is acknowledged.
Caution The interrupt request signal that is disabled by setting the PSC.NMI1M, PSC.NMI0M, and
PSC.INTM bits to 1 becomes invalid and IDLE2 mode is not released.
Table 25-6. Operation After Releasing IDLE2 Mode by Interrupt Request Signal
Release Source Interrupt Enabled (EI) Status Interrupt Disabled (DI) Status
Non-maskable interrupt request
signal
Execution branches to the handler address after securing the prescribed setup time.
Maskable interrupt request signal Execution branches to the handler address
or the next instruction is executed after
securing the prescribed setup time.
The next instruction is executed after
securing the prescribed setup time.
(2) Releasing IDLE2 mode by reset
The same operation as the normal reset operation is performed.