Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1297 of 1513
Aug 12, 2011
(3) External interrupt falling, rising edge specification register 3 (INTF3, INTR3)
The INTF3 and INTR3 registers are 8-bit registers that specify detection of the falling and rising edges of the
external interrupt pin (INTP07 to INTP09).
These registers can be read or written in 8-bit or 1-bit units.
Reset sets these registers to 00H.
Caution When the function is changed from the external interrupt function (alternate function) to the port
function, an edge may be detected. Therefore, set the INTF3n and INTR3n bits to 00, and then set
the port mode.
0INTF3 0 0 INTF34 0 0 INTF31 INTF30
After reset: 00H R/W Address: INTF3 FFFFFC06H, INTR3 FFFFFC26H
0INTR3 0 0 INTR34 0 0 INTR31 INTR30
INTP09
INTP08 INTP07
INTP09 INTP08 INTP07
76543210
76543210
Remark For how to specify a valid edge, see Table 23-7.
Table 23-7. Valid Edge Specification
INTF3n INTR3n Valid Edge Specification
0 0 No edge detected
0 1 Rising edge
1 0 Falling edge
1 1 Both rising and falling edges
Caution Be sure to set the INTF3n and INTR3n bits to 00 when these registers are not used as the
INTP07 to INTP09 pin.
Remark n = 0, 1, 4: Control of INTP07 to INTP09 pins