Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1294 of 1513
Aug 12, 2011
23.6 External Interrupt Request Input Pins (NMI and INTP00 to INTP18)
23.6.1 Noise elimination
(1) Eliminating noise on NMI pin
The NMI pin has an internal noise elimination circuit that uses analog delay. Therefore, the input level of the NMI
pin is not detected as an edge unless it is maintained for a specific time or longer. Therefore, an edge is detected
after specific time.
The NMI pin can be used to release the STOP mode. In the STOP mode, noise is not eliminated by using the
system clock because the internal system clock is stopped.
(2) Eliminating noise on INTP00, INTP01, and INTP03 to INTP18 pins
The INTP00, INTP01, and INTP03 to INTP18 pins have an internal noise elimination circuit that uses analog delay.
Therefore, the input level of the NMI pin is not detected as an edge unless it is maintained for a specific time or
longer. Therefore, an edge is detected after specific time.
(3) Eliminating noise on INTP02
The INTP02 pin has an internal noise elimination circuit that uses analog delay and an internal digital noise
elimination circuit. Either can be selected by using the noise elimination control register (INTNFC) (see 23.6.2 (7)).
23.6.2 Edge detection
The valid edge of each of the NMI and INTP00 to INTP18 pins can be selected from the following four.
Rising edge
Falling edge
Both rising and falling edges
No edge detected
The edge of the NMI pin is not detected after reset. Therefore, the interrupt request signal is not acknowledged unless
a valid edge is enabled by using the INTF0 and INTR0 register (the NMI pin functions as a normal port pin).