Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1291 of 1513
Aug 12, 2011
Figure 23-11. Exception Trap Processing
Exception trap (ILGOP) occurs
DBPC
DBPSW
PSW.NP
PSW.EP
PSW.ID
PC
Restored PC
PSW
1
1
1
00000060H
Exception processing
CPU processing
(2) Restoration
Restoration from an exception trap is carried out by the DBRET instruction. By executing the DBRET instruction,
the CPU carries out the following processing and controls the address of the restored PC.
<1> Loads the restored PC and PSW from DBPC and DBPSW.
<2> Transfers control to the address indicated by the restored PC and PSW.
Caution DBPC and DBPSW can be accessed only during the interval between the execution of an illegal
opcode and DBRET instruction.
Processing for restoring from an exception trap is shown below.
Figure 23-12. Processing for Restoring from Exception Trap
DBRET instruction
PC
PSW
DBPC
DBPSW
Jump to address of restored PC