Datasheet
V850ES/JG3-H, V850ES/JH3-H CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0042EJ0500 Rev.5.00 Page 1256 of 1513
Aug 12, 2011
CHAPTER 23 INTERRUPT/EXCEPTION PROCESSING FUNCTION
The V850ES/JG3-H and V850ES/JH3-H are provided with a dedicated interrupt controller (INTC) for interrupt servicing
and can process a total of 86 to 93 interrupt requests.
An interrupt is an event that occurs independently of program execution, and an exception is an event whose
occurrence is dependent on program execution.
The V850ES/JG3-H and V850ES/JH3-H can process interrupt request signals from the on-chip peripheral hardware
and external sources. Moreover, exception processing can be started by the TRAP instruction (software exception) or by
generation of an exception event (i.e. fetching of an illegal opcode) (exception trap).
23.1 Features
Interrupts
Table 23-1. Interrupts of V850ES/JG3-H and V850ES/JH3-H
Internal External
Non-maskable Maskable Total Non-maskable Maskable Total
μ
PD70F3760 1 68 69 1 16 17
μ
PD70F3761 1 68 69 1 16 17
μ
PD70F3762 1 68 69 1 16 17
V850ES/JG3-H
μ
PD70F3770 1 72 73 1 16 17
μ
PD70F3765 1 68 69 1 19 20
μ
PD70F3766 1 68 69 1 19 20
μ
PD70F3767 1 68 69 1 19 20
V850ES/JH3-H
μ
PD70F3771 1 72 73 1 19 20
• 8 levels of programmable priorities (maskable interrupts)
• Multiple interrupt control according to priority
• Masks can be specified for each maskable interrupt request.
• Noise elimination, edge detection, and valid edge specification for external interrupt request signals.
Exceptions
• Software exceptions: 32 sources
• Exception trap: 2 sources (illegal opcode exception)
Interrupt/exception sources of the V850ES/JG3-H and V850ES/JH3-H are listed in Tables 23-2 and 23-3, respectively.