Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1228 of 1513
Aug 12, 2011
Figure 21-33. DMA Processing by Bulk Transfer (IN) (1/4)
START
Setting MODEx (UF0IDR)
DQBI1MS = 1 (UF0IDR)
DQE1 = 1
(UF0DMS0)
No
FIFO on CPU side full?
Yes
MODE1, MODE0 = 10: Demand mode
Yes
FIFO full?
No
No
TC signal received?
Yes
DMA request for
Endpoint1 active
Writing UF0BI1
register by DMA
If return data greater than the FIFO size exists,
it is divided into FIFO size units, and sequentially
written, starting from the lowest data byte.
(3)
(5)
(1)
Yes
BKI1T = 1?
(UF0DEND)
No
(2)
Remark ♦: Processing by hardware