Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1192 of 1513
Aug 12, 2011
Figure 21-20. CLEAR_FEATURE Processing
Set the corresponding bit for the value of 0XH.
The EPHALT bit of the UF0IS0 register is cleared to 0
only when all Halt Features are cleared.
UF0CLR register = 0XH
CLRRQ = 1
(UF0IS0)
HALTn = 0
(UF0EPS2)
Clearing UF0DSTL register
Clearing UF0EnSL register
Remarks 1. n = 0 to 4, 7
2. ♦: Processing by hardware