Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)

R01UH0042EJ0500 Rev.5.00 Page 1189 of 1513

Aug 12, 2011

21.9.2 Interrupt servicing

The following flowchart illustrates how an interrupt is serviced.

Figure 21-18. Interrupt Servicing

END

(n = 0 to 4)

Reading UF0ISn register

Servicing interrupt

INTUSBF0 active

Target bit of UF0ICn

START

Remark ♦: Processing by hardware

The following bits of the UF0ISn register are automatically cleared by hardware when a given condition is satisfied (n =

0 to 4).

• E0INDT, E0ODT, SUCES, STG, and CPUDEC bits of UF0IS1 register

• BKI2DT, BKI1DT, and IT1DT bits of UF0IS2 register

• BKO2FL, BKO2DT, BKO1FL, and BKO1DT bits of UF0IS3 register

Because clearing an interrupt source by the UF0ICn register is given a lower priority than setting an interrupt source by

hardware, the interrupt source may not be cleared depending on the timing (n = 0 to 4).