Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1174 of 1513
Aug 12, 2011
21.6.8 Bulk-in register
(1) UF0 EP1 bulk-in transfer data register (UF0EP1BI)
The UF0EP1BI register writes the bulk-in transfer data of EP1.
The UF0EP1BI register can be read or written in 8-bit or 16-bit units.
After reset: 0000H R/W Address: 00201000H
15 14 13 12 11 10 9 8
UF0EP1BI 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
EP1BI7 EP1BI6 EP1BI5 EP1BI4 EP1BI3 EP1BI2 EP1BI1 EP1BI0
Bit position Bit name Function
7 to 0
EP1BI7 to
EP1BI0
Writing the bulk-out transfer data of EP1.
Data outputting to the EPC macro by writing data to this register.
If using this register, setting the address (00201000H) in DMA destination address register
(DDAn (n = 0 to 3)) of DMAC. In addition, set the RQnUR1E (n = 0 to 3) bit of the UFDRQEN
register to 1 to assign a DMA channel.
(2) UF0 EP3 bulk-in transfer data register (UF0EP3BI)
The UF0EP3BI register writes the bulk-in transfer data of EP1.
The UF0EP3BI register can be read or written in 8-bit or 16-bit units.
After reset: 0000H R/W Address: 00202000H
15 14 13 12 11 10 9 8
UF0EP3BI 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
EP3BI7 EP3BI6 EP3BI5 EP3BI4 EP3BI3 EP3BI2 EP3BI1 EP3BI0
Bit position Bit name Function
7 to 0
EP3BI7 to
EP3BI0
Writing the bulk-out transfer data of EP3.
Data outputting to the EPC macro by writing data to this register.
If using this register, setting the address (00202000H) in DMA destination address register
(DDAn (n = 0 to 3)) of DMAC. In addition, set the RQnUR3E (n = 0 to 3) bit of the UFDRQEN
register to 1 to assign a DMA channel.