Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1170 of 1513
Aug 12, 2011
21.6.7 DMA register
(1) EPn DMA control register 1 (UF0E1DC1 to UF0E4DC1)
The UF0E1DC1 to UF0E4DC1 register controls the DMA transfer of end point n (EPn). (n = 1 to 4)
The UF0E1DC1 to UF0E4DC1 register can be read or written in 16-bit units.
(1/2)
After reset: 0000H R/W Address: 00200500H
15 14 13 12 11 10 9 8
UF0E1DC1 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 EP1BULK2 EP1BULK1 EP1BULK0 EP1STOP EP1REQ EP1DMAEN
After reset: 0000H R/W Address: 00200504H
15 14 13 12 11 10 9 8
UF0E2DC1 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 EP2BULK2 EP2BULK1 EP2BULK0 EP2STOP EP2REQ EP2DMAEN
After reset: 0000H R/W Address: 00200508H
15 14 13 12 11 10 9 8
UF0E3DC1 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 EP3BULK2 EP3BULK1 EP3BULK0 EP3STOP EP3REQ EP3DMAEN
After reset: 0000H R/W Address: 0020050CH
15 14 13 12 11 10 9 8
UF0E4DC1 0 0 0 0 0 0 0 0
7 6 5 4 3 2 1 0
0 0 EP4BULK2 EP4BULK1 EP4BULK0 EP4STOP EP4REQ EP4DMAEN