Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 4 PORT FUNCTIONS
R01UH0042EJ0500 Rev.5.00 Page 116 of 1513
Aug 12, 2011
(5) Port 2 function control expansion register (PFCE2)
PFCE2
After reset: 00H R/W Address: FFFFF704H
0 0 0 0 PFCE23 PFCE22 PFCE21 PFCE20
76543210
Remark For details of alternate function specification, see 4.3.3 (6) Port 2 alternate function
specifications.
(6) Port 2 alternate function specifications
PFCE23 PFC23 Specification of P23 pin alternate function
0 0 SCKF2 I/O
0 1 KR5 input
1 0 RTP05 output
1 1 Setting prohibited
PFCE22 PFC22 Specification of P22 pin alternate function
0 0 SOF2 output
0 1 KR4 input
1 0 RTP04 output
1 1 Setting prohibited
PFCE21 PFC21 Specification of P21 pin alternate function
0 0 SIF2 input
0 1 KR3 input/TIAB00 input
Note
1 0 TOAB00 output
1 1 RTP03 output
Note KR3 and TIAB00 are alternate functions. When using the pin as the TIAB00 pin, disable the KR3 pin key
return detection, which is the alternate function (clear the KRM.KRM3 bit to 0). Also, when using the pin
as the KRn pin, disable TIAB00 pin edge detection, which is the alternate function (TAB0IOC1.TAB0TIG0,
TAB0TIG1 bit = 00 B, TAB0IOC2 register = 00H).
PFCE20 PFC20 Specification of P20 pin alternate function
0 0 TIAB03 input/KR02 input
0 1 KR2 input
1 0 TOAB03 output
1 1 Setting prohibited