Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1156 of 1513
Aug 12, 2011
(6) UF0 EP4 status register L (UF0E4SL)
This register stores the value that is to be returned in response to the GET_STATUS Endpoint4 request.
This register can be read or written in 8-bit units. Note, however, that data can be written to this register only when
the EP0NKA bit is set to 1.
If an error occurs in Endpoint4, the E4HALT bit is set to 1. A write access to this register is ignored while a USB-
side access to Endpoint4 is being received.
The hardware automatically transmits the contents of this register to the host when it has received the
GET_STATUS Endpoint4 request. If Endpoint4 has stalled, the UF0BO2 register is cleared and the BKO2NK bit is
cleared to 0.
Because writing this register is always masked when transfer to Endpoint4, rather than control transfer, is executed,
be sure to check this register to see if data has been correctly written to it.
Caution To rewrite this register, set the EP0NKA bit to 1 before reading the register contents, and rewrite
the register contents after confirming that the bit has been set, in order to prevent conflict
between a read access and a write access.
0UF0E4SL 0
5
00
3
0
2
0
1
0 E4HALT
Address
0020015CH
After reset
00H
0467
Bit position Bit name Function
0 E4HALT
This bit indicates the status of Endpoint4.
1: Stalled
0: Not stalled
This bit is set to 1 by hardware when the SET_FEATURE Endpoint4 request has been
received. It is cleared to 0 by hardware when the CLEAR_FEATURE Endpoint4 request,
SET_CONFIGURATION request, or the SET_INTERFACE request for the Interface to
which Endpoint4 is linked has correctly been received. DATA PID is initialized to DATA0.