Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1150 of 1513
Aug 12, 2011
Figure 21-11. Operation of UF0INT1 Register
(a) 8-byte transfer
Status of
UF0INT1 register
Transmission
starts
Transmission
completed
ACK
reception
Transmission
starts
Transmission
completed
Re-transmission
starts
ACK
reception
ACK cannot
be received
IT1NK bit of
UF0EN register
IT1 bit of
UF0EPS0 register
IT1DT bit of
UF0IS2 register
FIFO full
Hardware clear
FIFO full
8-byte transfer8-byte transfer Re-transfer
INT clear
(FW clear)
Writing
FIFO
starts
Writing
FIFO
completed
Writing
FIFO
starts
Writing
FIFO
completed
Counter
reloaded
(b) When Null packet or short packet is transmitted
Status of
UF0INT1 register
Transmission
starts
Transmission
completed
ACK
reception
Transmission
starts
Transmission
completed
ACK
reception
IT1NK bit of
UF0EN register
IT1 bit of
UF0EPS0 register
IT1DT bit of
UF0IS2 register
Hardware clear
IT1DEND bit of
UF0DEND
register is set.
IT1DEND bit of
UF0DEND
register is set.
Short packet transferTransfer of Null packet
INT clear
(FW clear)
Writing
FIFO
starts
Writing
FIFO
completed
FIFO FW clear