Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1142 of 1513
Aug 12, 2011
Figure 21-9. Operation of UF0BI1 Register (1/3)
(a) Operation example 1
SIE side
CPU side
Status of
UF0BI1 register
Transmission
completed
FIFO toggle
FIFO toggle
ACK
reception
Transmission
starts
Transmission
completed
ACK
reception
BKI1NK bit of
UF0EN register
64-byte transfer64-byte transfer
FIFO_0
FIFO_1
FIFO_1
FIFO_0
Writing
FIFO
starts
Writing
FIFO
completed
Writing
FIFO
starts
Writing
FIFO
completed
BKI1DT bit of
UF0IS2 register
Hardware clear
INT clear
(FW clear)
BKI1DED bit of
UF0DEND register is
set or hardware set
BKI1DED bit of
UF0DEND register is
set or hardware set
FIFO_0
FIFO_1
64-byte transfer