Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1138 of 1513
Aug 12, 2011
(7) UF0 bulk-out 2 register (UF0BO2)
The UF0BO2 register is a 64-byte × 2 FIFO that stores data for Endpoint4. This register consists of two banks of
64-byte FIFOs each of which performs a toggle operation and repeatedly connects the buses on the SIE and CPU
sides. The toggle operation takes place when data is in the FIFO on the SIE side and when no data is in the FIFO
on the CPU side (counter value = 0).
This register is read-only, in 8-bit units. A write access to this register is ignored.
When the hardware receives data for Endpoint4 from the host, it automatically transfers the data to the UF0BO2
register. When the register correctly receives the data, a FIFO toggle operation occurs. As a result, the BKO2DT
bit of the UF0IS3 register is set to 1, the quantity of the received data is held by the UF0BO2L register, and an
interrupt request or DMA request is issued to the CPU. Whether the interrupt request or DMA request is issued can
be selected by using the DQBO2MS bit of the UF0IDR register.
Read the data held by the UF0BO2 register by FW, up to the value of the amount of data read by the UF0BO2L
register. When the correct received data is held by the FIFO connected to the SIE side and the value of the
UF0BO2L register reaches 0, the toggle operation of the FIFO occurs, and the BKO2NK bit of the UF0EN register
is automatically cleared to 0. If data greater than the value of the UF0BO2L register is read and if the FIFO toggle
condition is satisfied, the toggle operation of the FIFO occurs. As a result, the next packet may be read by mistake.
Note that, if the toggle condition is not satisfied, the first data is repeatedly read.
If overrun data is received while data is held by the FIFO connected to the CPU side, Endpoint4 stalls, and the
FIFO on the CPU side is cleared.
When the UF0BO2 register is read while no data is in it, an undefined value is read.
Caution Be sure to read all the data stored in this register.
BKO27UF0BO2 BKO26
5
BKO25 BKO24
3
BKO23
2
BKO22
1
BKO21 BKO20
Address
0020010CH
After reset
Undefined
0467
Bit position Bit name Function
7 to 0
BKO27 to
BKO20
These bits store data for Endpoint4.
The operation of the UF0BO2 register is illustrated below.