Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1130 of 1513
Aug 12, 2011
(3) UF0 EP0 setup register (UF0E0ST)
The UF0E0ST register holds the SETUP data sent from the host.
This register is read-only, in 8-bit units. A write access to this register is ignored.
The UF0E0ST register always writes data when a SETUP transaction has been received. The hardware sets the
PROT bit of the UF0IS1 register when it has correctly received the SETUP transaction. It sets the CPUDEC bit of
the UF0IS1 register in the case of an FW-processed request. Then an interrupt request (INTUSBF0) is issued. In
the case of an FW-processed request, be sure to read the request in 8-byte units. If it is not read in 8-byte units,
the subsequent requests cannot be correctly decoded. The read counter of the UF0E0ST register is not cleared
even when Bus Reset is received. Always read this counter in 8-byte units regardless of whether Bus Reset is
received or not.
Because the UF0E0ST register always enables writing, the hardware overwrites data to this register even if a
SETUP transaction is received while the data of the register is being read. Even if the SETUP transaction cannot
be correctly received, the CPUDEC interrupt request and Protect interrupt request are not generated, but the
previous data is discarded. If a SETUP token of less than 8 bytes is received, however, the received SETUP token
is discarded, and the previously received SETUP data is retained. If the SETUP token is received more than once
when control transfer is executed once, be sure to check the PROT bit of the UF0IS1 register under the conditions
below. If PROT bit = 1, read the UF0E0ST register again because the SETUP transaction has been received more
than once.
<1> If a request is decoded by FW and the UF0E0R register is read or the UF0E0W register is written
<2> When preparing for a STALL response for the request to which the decode result does not correspond
Caution Be sure to read all the stored data. The UF0E0ST register is always updated by the request in the
SETUP transaction.
E0S7UF0E0ST E0S6
5
E0S5 E0S4
3
E0S3
2
E0S2
1
E0S1 E0S0
Address
00200104H
After reset
00H
0467
Bit position Bit name Function
7 to 0 E0S7 to E0S0 These bits hold the SETUP data sent from the host.
The operation of the UF0E0ST register is illustrated below.