Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1114 of 1513
Aug 12, 2011
(30) UF0 FIFO clear 1 register (UF0FIC1)
This register clears each FIFO.
This register is write-only, in 8-bit units. If this register is read, 00H is read.
FW can clear the target FIFO by writing 1 to the corresponding bit of this register. The bit to which 1 has been
written is automatically cleared to 0. Writing 0 to the bit is invalid.
The related bits are invalid if each endpoint is not supported by the setting of the UF0EnIM register (n = 2, 4) and
the current setting of the interface.
0UF0FIC1 0
5
00
3
BKO2C
2
BKO2CC
1
BKO1C BKO1CC
Address
00200062H
After reset
00H
0467
Bit position Bit name Function
3, 1 BKOnC
These bits clear the FIFOs on both the SIE and CPU sides of the UF0BOn register (reset
the counter).
1: Clear
When the BKOnNK bit is set to 1 (except when it has been set by FW), the BKOnNK bit is
automatically cleared to 0 by clearing the FIFO.
2, 0 BKOnCC
These bits clear only the FIFO on the CPU side of the UF0BOn register (reset the
counter).
1: Clear
When the BKOnNK bit is set to 1 (except when it has been set by FW), the BKOnNK bit is
automatically cleared to 0 by clearing the FIFO.
Remark n = 1, 2