Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1103 of 1513
Aug 12, 2011
(20) UF0 INT mask 4 register (UF0IM4)
This register controls masking of the interrupt sources indicated by the UF0IS4 register.
This register can be read or written in 8-bit units.
FW can mask occurrence of an interrupt request from USBF (INTUSBF0) by writing 1 to the corresponding bit of
this register.
The related bits are invalid if each endpoint is not supported by the setting of the UF0EnIM register (n = 1 to 4, 7)
and the current setting of the interface.
0UF0IM4 0
5
SETINTM 0
3
0
2
0
1
00
Address
00200036H
After reset
00H
0467
Bit position Bit name Function
5 SETINTM
This bit masks the SET_INT interrupt.
1: Mask
0: Do not mask (default value)