Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1101 of 1513
Aug 12, 2011
(18) UF0 INT mask 2 register (UF0IM2)
This register controls masking of the interrupt sources indicated by the UF0IS2 register.
This register can be read or written in 8-bit units.
FW can mask occurrence of an interrupt request from USBF (INTUSBF0) by writing 1 to the corresponding bit of
this register.
The related bits are invalid if each endpoint is not supported by the setting of the UF0EnIM register (n = 1, 3, 7)
and the current setting of the interface.
UF0IM2
5
BKI1INM
3
0
2
0
1
0
Address
00200032H
After reset
00H
0
IT1DTM
4
BKI1
DTM
6
BKI2
DTM
7
BKI2INM
Bit position Bit name Function
7, 5 BKInINM
These bits mask the BLKInIN interrupt.
1: Mask
0: Do not mask (default value)
6, 4 BKInDTM
These bits mask the BLKInDT interrupt.
1: Mask
0: Do not mask (default value)
0 IT1DTM
These bits mask the INTnDT interrupt.
1: Mask
0: Do not mask (default value)
Remark n = 1, 2