Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 21 USB FUNCTION CONTROLLER (USBF)
R01UH0042EJ0500 Rev.5.00 Page 1085 of 1513
Aug 12, 2011
(6) UF0 CLR request register (UF0CLR)
This register indicates the target of the received CLEAR_FEATURE request.
This register is read-only, in 8-bit units.
This register is meaningful only when an interrupt request is generated. Each bit is set to 1 after completion of the
status stage, and automatically cleared to 0 when this register is read.
The related bits are invalid if each endpoint is not supported by the setting of the UF0EnIM register (n = 1 to 4, 7)
and the current setting of the interface.
0UF0CLR CLREP7
5
CLREP4 CLREP3
3
CLREP2
2
CLREP1
1
CLREP0 CLRDEV
Address
0020000AH
After reset
00H
0467
Bit position Bit name Function
6 to 1 CLREPn
These bits indicate that a CLEAR_FEATURE Endpoint n request is received and
automatically processed.
1: Automatically processed
0: Not automatically processed (default value)
0 CLRDEV
This bit indicates that a CLEAR_FEATURE Device request is received and automatically
processed.
1: Automatically processed
0: Not automatically processed (default value)
Remark n = 0 to 4, 7