Datasheet

V850ES/JG3-H, V850ES/JH3-H CHAPTER 20 CAN CONTROLLER
R01UH0042EJ0500 Rev.5.00 Page 1020 of 1513
Aug 12, 2011
Figure 20-39 shows the processing for a receive message buffer (C0MCONFm.MT2 to C0MCONFm.MT0 bits = 001B
to 101B).
Figure 20-39. Message Buffer Redefinition
START
END
No
Ye s
No
Ye s
Ye s
No
START
Set
message buffers.
END
RDY = 1?
No
Ye s
Clear RDY bit.
C0MCTRLm.SET_RDY = 0
C0MCTRLm.CLEAR_RDY
= 1
RDY = 0?
RSTAT = 0 or
VALID = 1?
Note 1
No
Clear VALID bit.
C0CTRLCLEAR_VALID =1
Set RDY bit.
C0MCTRLm.SET_RDY = 1
C0MCTRLm.CLEAR_RDY = 0
Ye s
Ye s
No
Wait for a period of 4 CAN data
bits
Note 2
.
Notes 1. If redefinition is performed during a message reception, confirm that a message is being received
because the RDY bit must be set after a message is completely received.
2. This 4-bit period may redefine the message buffer while a message is received and stored.