Datasheet

V850ES/JG3 CHAPTER 4 PORT FUNCTIONS
R01UH0015EJ0300 Rev.3.00 Page 83 of 870
Sep 30, 2010
4.3.5 Port 5
Port 5 is a 6-bit port that controls I/O in 1-bit units.
Port 5 includes the following alternate-function pins.
Table 4-8. Port 5 Alternate-Function Pins
Pin Name Pin No. Alternate-Function Pin Name I/O Remark Block Type
P50 37 TIQ01/KR0/TOQ01/RTP00 I/O U-5
P51 38 TIQ02/KR1/TOQ02/RTP01 I/O U-5
P52 39 TIQ03/KR2/TOQ03/RTP02/DDI
Note
I/O U-6
P53 40 SIB2/KR3/TIQ00/TOQ00/RTP03/DDO
Note
I/O U-7
P54 41 SOB2/KR4/RTP04/DCK
Note
I/O U-8
P55 42 SCKB2/KR5/RTP05/DMS
Note
I/O
Selectable as N-ch open-drain output
U-9
Note The DDI, DDO, DCK, and DMS pins are for on-chip debugging.
If on-chip debugging is not used, fix the P05/INTP2/DRST pin to low level between when the reset signal of the
RESET pin is released and when the OCDM.OCDM0 bit is cleared (0).
For details, see 4.6.3 Cautions on on-chip debug pins.
Cautions 1. When the power is turned on, the P53 pin may output undefined level temporarily even during
reset.
2. The P50 to P55 pins have hysteresis characteristics in the input mode of the alternate function,
but do not have hysteresis characteristics in the port mode.
(1) Port 5 register (P5)
0
Outputs 0
Outputs 1
P5n
0
1
Output data control (in output mode) (n = 0 to 5)
P5 0 P55 P54 P53 P52 P51 P50
After reset: 00H (output latch) R/W Address: FFFFF40AH