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V850ES/JG3 APPENDIX F REVISION HISTORY
R01UH0015EJ0300 Rev.3.00 Page 870 of 870
Sep 30, 2010
APPENDIX F REVISION HISTORY
F.1 Major Revisions in This Edition
Page Description
p. 474 Modification of Caution in 15.6.10 Receive data noise filter
p. 474 Modification of Figure 15-15. Timing of RXDAn Signal Judged as Noise
p. 798 Modification of Flash Memory Programming Characteristics
p. 799 Addition of Remark to CHAPTER 29 (3) Programming characteristics
F.2 Revision History of Previous Editions
A history of the revisions up to this edition is shown below. “Applied to:” indicates the chapters to which the revision was
applied.
Edition Description Applied to:
• Change of under development state of all products → Development completed
μ PD70F3739GC-UEU-AX, 70F3740GC-UEU-AX, 70F3741GC-UEU-AX, 70F3742GC-UEU-AX
Throughout
Modification of Figure 7-18 Register Setting for Operation in External Trigger Pulse Output Mode
Modification of Figure 7-22 Register Setting for Operation in One-Shot Pulse Output Mode
Modification of Figure 7-36 Register Setting in Pulse Width Measurement Mode
CHAPTER 7 16-BIT
TIMER/EVENT
COUNTER P (TMP)
Modification of Figure 8-18 Register Setting for Operation in External Trigger Pulse Output Mode
Modification of Figure 8-22 Register Setting for Operation in One-Shot Pulse Output Mode
Modification of Figure 8-36 Register Setting in Pulse Width Measurement Mode
CHAPTER 8 16-BIT
TIMER/EVENT
COUNTER Q (TMQ)
Modification of Table 13-2 Conversion Time Selection in Normal Conversion Mode (ADA0HS1 Bit
= 0)
Modification of Table 13-3 Conversion Time Selection in High-Speed Conversion Mode (ADA0HS1
Bit = 1)
Modification of Figure 13-3 Conversion Operation Timing (Continuous Conversion)
CHAPTER 13 A/D
CONVERTER
Modification of Figure 15-4 Block Diagram of Asynchronous Serial Interface An CHAPTER 15
ASYNCHRONOUS
SERIAL
INTERFACE A
(UARTA)
Modification of 18.13 (4) (a) Temporarily stop transfer of all DMA channels
Modification of 18.13 (8) Bus arbitration for CPU
CHAPTER 18 DMA
FUNCTION (DMA
CONTROLLER)
Modification of Table 27-2 Basic Functions
Modification of Table 27-3 Security Functions
Modification of Table 27-4 Security Setting
Modification of Figure 27-7 Procedure for Manipulating Flash Memory
Modification of Table 27-7 Flash Memory Control Commands
Modification of Figure 27-17 Standard Self Programming Flow
Modification of Table 27-10 Flash Function List
Modification of Table 27-11 Internal Resources Used
CHAPTER 27
FLASH MEMORY
Addition of CHAPTER 29 (i) KYOCERA KINSEKI CORPORATION: Crystal resonator (TA = −10 to
+70°C)
Addition of CHAPTER 29 (ii) Murata Mfg. Co. Ltd.: Ceramic resonator (TA = −20 to +80°C)
CHAPTER 29
ELECTRICAL
SPECIFICATIONS
Addition of CHAPTER 31 RECOMMENDED SOLDERING CONDITIONS CHAPTER 31
RECOMMENDED
SOLDERING
CONDITIONS
2nd
Addition of APPENDIX F REVISION HISTORY APPENDIX F
REVISION
HISTORY