Datasheet

V850ES/JG3 CHAPTER 4 PORT FUNCTIONS
R01UH0015EJ0300 Rev.3.00 Page 72 of 870
Sep 30, 2010
(4) Port 0 function control register (PFC0)
PFC0
After reset: 00H R/W Address: FFFFF460H
0 0 0 0 PFC03 0 0 0
INTP0 input
ADTRG input
PFC03
0
1
Specification of P03 pin alternate function
(5) Port 0 function register (PF0)
0
Normal output (CMOS output)
N-ch open drain output
PF0n
0
1
Control of normal output or N-ch open-drain output (n = 2 to 6)
PF0 PF06 PF05 PF04 PF03 PF02 0 0
After reset: 00H R/W Address: FFFFFC60H
Caution When an output pin is pulled up at EV
DD or higher, be sure to set the PF0n bit to 1.