Datasheet

V850ES/JG3 APPENDIX E LIST OF CAUTIONS
R01UH0015EJ0300 Rev.3.00 Page 848 of 870
Sep 30, 2010
(15/36)
Chapter
Classification
Function Details of
Function
Cautions Page
Set as 2.6 μ s ≤ conversion time ≤ 10.4 μ s. p. 414Conversion time
selection in
high-speed
conversion
mode
(ADA0HS1 bit =
1)
In the high-speed conversion mode, rewriting of the ADA0M0, ADA0M2, ADA0S,
ADA0PFM, and ADA0PFT registers and trigger input are prohibited during the
stabilization time.
p. 414
When writing data to the ADA0M2 register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
p. 415ADA0M2
register
Be sure to clear bits 7 to 2 to “0”. p. 415
When writing data to the ADA0S register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
p. 416ADA0S register
Be sure to clear bits 7 to 4 to “0”. p. 416
Accessing the ADA0CRn and ADA0CRnH registers is prohibited in the following
statuses. For details, see 3.4.8 (2) Accessing specific on-chip peripheral I/O
registers.
• When the CPU operates with the subclock and the main clock oscillation is
stopped
• When the CPU operates with the internal oscillation clock
p. 417ADA0CRn,
ADA0CRnH
registers
A write operation to the ADA0M0 and ADA0S registers may cause the contents of
the ADA0CRn register to become undefined. After the conversion, read the
conversion result before writing to the ADA0M0 and ADA0S registers. Correct
conversion results may not be read if a sequence other than the above is used.
p. 417
In the select mode, the 8-bit data set to the ADA0PFT register is compared with
the value of the ADA0CRnH register specified by the ADA0S register. If the result
matches the condition specified by the ADA0PFC bit, the conversion result is
stored in the ADA0CRn register and the INTAD signal is generated. If it does not
match, however, the interrupt signal is not generated.
p. 419
In the scan mode, the 8-bit data set to the ADA0PFT register is compared with the
contents of the ADA0CR0H register. If the result matches the condition specified
by the ADA0PFC bit, the conversion result is stored in the ADA0CR0 register and
the INTAD signal is generated. If it does not match, however, the INTAD signal is
not generated. Regardless of the comparison result, the scan operation is
continued and the conversion result is stored in the ADA0CRn register until the
scan operation is completed. However, the INTAD signal is not generated after
the scan operation has been completed.
p. 419
ADA0PFM
register
When writing data to the ADA0PFM register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
p. 419
Chapter 13
Soft
A/D
converter
ADA0PFT
register
When writing data to the ADA0PFT register in the following modes, stop the A/D
conversion by clearing the AD0M0.ADA0CE bit to 0. After the data is written to
the register, enable the A/D conversion again by setting the ADA0CE bit to 1.
• Normal conversion mode
• One-shot select mode/one-shot scan mode in high-speed conversion mode
p. 420