Datasheet

V850ES/JG3 CHAPTER 4 PORT FUNCTIONS
R01UH0015EJ0300 Rev.3.00 Page 70 of 870
Sep 30, 2010
4.3.1 Port 0
Port 0 is a 5-bit port for which I/O settings can be controlled in 1-bit units.
Port 0 includes the following alternate-function pins.
Table 4-4. Port 0 Alternate-Function Pins
Pin Name Pin No. Alternate-Function Pin Name I/O Remark Block Type
P02 17 NMI Input L-1
P03 18 INTP0/ADTRG Input N-1
P04 19 INTP1 Input L-1
P05 20 INTP2/DRST
Note
Input AA-1
P06 21 INTP3 Input
Selectable as N-ch open-drain output
L-1
Note The DRST pin is for on-chip debugging.
If on-chip debugging is not used, fix the P05/INTP2/DRST pin to low level between when the reset signal of the
RESET pin is released and when the OCDM.OCDM0 bit is cleared (0).
For details, see 4.6.3 Cautions on on-chip debug pins.
Caution The P02 to P06 pins have hysteresis characteristics in the input mode of the alternate function, but
do not have hysteresis characteristics in the port mode.
(1) Port 0 register (P0)
0
Outputs 0.
Outputs 1.
P0n
0
1
Output data control (in output mode) (n = 2 to 6)
P0 P06 P05 P04 P03 P02 0 0
After reset: 00H (output latch) R/W Address: FFFFF400H