Datasheet

V850ES/JG3 APPENDIX E LIST OF CAUTIONS
R01UH0015EJ0300 Rev.3.00 Page 836 of 870
Sep 30, 2010
(3/36)
Chapter
Classification
Function Details of
Function
Cautions Page
Soft
PM1 register When using one of the P10 and P11 pins as an I/O port and the other as a D/A
output pin, do so in an application where the port I/O level does not change during
D/A output.
p. 73
Hard
Port 3 The P31 to P35, P38, and P39 pins have hysteresis characteristics in the input
mode of the alternate-function pin, but do not have the hysteresis characteristics
in the port mode.
p. 74
P3 register To read/write bits 8 to 15 of the P3 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the P3H register.
p. 75
PM3 register To read/write bits 8 to 15 of the PM3 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PM3H register.
p. 75
Be sure to set bits 15 to 10, 7, and 6 to “0”. p. 76 PMC3 register
To read/write bits 8 to 15 of the PMC3 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PMC3H register.
p. 76
PFC3 register To read/write bits 8 to 15 of the PFC3 register in 8-bit or 1-bit units, specify them
as bits 0 to 7 of the PFC3H register.
p. 77
PFCE3L
register
Be sure to set bits 7 to 3, 1, and 0 to “0”. p. 77
PFC31/RXDA0
input/INTP7
input
The INTP7 pin and RXDA0 pin are alternate-function pins. When using the pin as
the RXDA0 pin, disable edge detection for the INTP7 alternate-function pin.
(Clear the INTF3.INTF31 bit and the INTR3.INTR31 bit to 0.) When using the pin
as the INTP7 pin, stop UARTA0 reception. (Clear the UA0CTL0.UA0RXE bit to
0.)
p. 78
When an output pin is pulled up at EVDD or higher, be sure to set the PF3n bit to 1. p. 79
Soft
PF3 register
To read/write bits 8 to 15 of the PF3 register in 8-bit or 1-bit units, specify them as
bits 0 to 7 of the PF3H register.
p. 79
Hard
Port 4 The P40 to P42 pins have hysteresis characteristics in the input mode of the
alternate-function pin, but do not have the hysteresis characteristics in the port
mode.
p. 80
Soft
PF4 register When an output pin is pulled up at EVDD or higher, be sure to set the PF4n bit to
1.
p. 82
Hard, soft
The DDI, DDO, DCK, and DMS pins are used for on-chip debugging.
If on-chip debugging is not used, fix the P05/INTP2/DRST pin to low level
between when the reset signal of the RESET pin is released and when the
OCDM.OCDM0 bit is cleared (0).
For details, see 4.6.3 Cautions on on-chip debug pins.
p. 83
When the power is turned on, the P53 pin may output undefined level temporarily
even during reset.
p. 83
Hard
Port 5
The P50 to P55 pins have hysteresis characteristics in the input mode of the
alternate function, but do not have hysteresis characteristics in the port mode.
p. 83
Port 5 alternate
function
specifications
The KRn pin and TIQ0m pin are alternate-function pins. When using the pin as
the TIQ0m pin, disable KRn pin key return detection, which is the alternate
function. (Clear the KRM.KRMn bit to 0.) Also, when using the pin as the KRn
pin, disable TIQ0m pin edge detection, which is the alternate function (n = 0 to 3,
m = 0 to 3).
p. 86
PF5 register When an output pin is pulled up at EVDD or higher, be sure to set the PF5n bit to 1. p. 86
P7H register,
P7L register
Do not read/write the P7H and P7L registers during A/D conversion (see 13.6 (4)
Alternate I/O).
p. 88
Chapter 4
Soft
Port
functions
PM7H register,
PM7L register
When using the P7n pin as its alternate function (ANIn pin), set the PM7n bit to 1. p. 88