Datasheet

V850ES/JG3 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0015EJ0300 Rev.3.00 Page 795 of 870
Sep 30, 2010
I
2
C Bus Mode
Stop
condition
Start
condition
Restart
condition
Stop
condition
SCL0n (I/O)
SDA0n (I/O)
<101>
<107>
<107><106>
<106> <104> <105>
<103>
<100>
<99>
<100> <109>
<108>
<102>
Remark n = 0 to 2
A/D Converter
(T
A = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, 3.0 V ≤ AVREF0 ≤ 3.6 V, VSS = EVSS = AVSS = 0 V, CL = 50 pF)
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Resolution 10 bit
Overall error
Note
3.0
≤ AVREF0 ≤ 3.6 V
±0.6 %FSR
Conversion time tCONV 2.6 24 μ s
Zero scale error
±0.5
%FSR
Full scale error
±0.5
%FSR
Non-linearity error
±4.0
LSB
Differential linearity error
±4.0
LSB
Analog input voltage VIAN AVSS AVREF0 V
Reference voltage AVREF0 3.0 3.6 V
Normal conversion mode 3 6.5 mA
High-speed conversion mode 4 10 mA
AVREF0 current AIREF0
When A/D converter unused 5
μ A
Note Excluding quantization error (±0.05%FSR).
Caution Do not set (read/write) alternate-function ports during A/D conversion; otherwise the conversion
resolution may be degraded.
Remark LSB: Least Significant Bit
FSR: Full Scale Range