Datasheet

V850ES/JG3 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0015EJ0300 Rev.3.00 Page 792 of 870
Sep 30, 2010
Key Return Timing
(TA = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, VSS = EVSS = AVSS = 0 V, CL = 50 pF)
Parameter Symbol Conditions MIN. MAX. Unit
KRn high-level width tWKRH Analog noise elimination 500 ns
KRn low-level width tWKRL Analog noise elimination 500 ns
Remark n = 0 to 7
Timer Timing
(T
A = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, VSS = EVSS = AVSS = 0 V, CL = 50 pF)
Parameter Symbol Conditions MIN. MAX. Unit
TI high-level width tTIH 2T + 20 ns
TI low-level width tTIL
TIP00, TIP01, TIP10, TIP11, TIP20, TIP21,
TIP30, TIP31, TIP40, TIP41, TIP50, TIP51,
TIQ00 to TIQ03
2T + 20 ns
Remark T = 1/f
XX
UART Timing
(T
A = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, VSS = EVSS = AVSS = 0 V, CL = 50 pF)
Parameter Symbol Conditions MIN. MAX. Unit
Transmit rate 625 kbps
ASCK0 cycle time 10 MHz