Datasheet

V850ES/JG3 CHAPTER 29 ELECTRICAL SPECIFICATIONS
R01UH0015EJ0300 Rev.3.00 Page 770 of 870
Sep 30, 2010
Subclock Oscillator Characteristics
(TA = −40 to +85°C, VDD = EVDD = AVREF0 = AVREF1, VSS = EVSS = AVSS = 0 V)
Resonator Circuit Example Parameter Conditions MIN. TYP. MAX. Unit
Oscillation frequency
(f
XT)
Note 1
32 32.768 35 kHz
Crystal
resonator
XT2XT1
Oscillation
stabilization time
Note 2
10 s
Notes 1. The oscillation frequency shown above indicates only oscillator characteristics. Use the V850ES/JG3 so that
the internal operation conditions do not exceed the ratings shown in AC Characteristics and DC
Characteristics.
2. Time required from when V
DD reaches the oscillation voltage range (2.85 V (MIN.)) to when the crystal
resonator stabilizes.
Cautions 1. When using the subclock oscillator, wire as follows in the area enclosed by the broken lines in the
above figures to avoid an adverse effect from wiring capacitance.
• Keep the wiring length as short as possible.
• Do not cross the wiring with the other signal lines.
• Do not route the wiring near a signal line through which a high fluctuating current flows.
• Always make the ground point of the oscillator capacitor the same potential as V
SS.
• Do not ground the capacitor to a ground pattern through which a high current flows.
• Do not fetch signals from the oscillator.
2. The subclock oscillator is designed as a low-amplitude circuit for reducing power consumption,
and is more prone to malfunction due to noise than the main clock oscillator.
Particular care is therefore required with the wiring method when the subclock is used.
3. For the resonator selection and oscillator constant, customers are requested to either evaluate the
oscillation themselves or apply to the resonator manufacturer for evaluation.