Datasheet

V850ES/JG3 CHAPTER 28 ON-CHIP DEBUG FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 752 of 870
Sep 30, 2010
28.2 Debugging Without Using DCU
The following describes how to implement an on-chip debug function using MINICUBE2 with pins for UARTA0 (RXDA0
and TXDA0), pins for CSIB0 (SIB0, SOB0, SCKB0, and HS (PCM0)), or pins for CSIB3 (SIB3, SOB3, SCKB3, and HS
(PCM0)) as debug interfaces, without using the DCU.
28.2.1 Circuit connection examples
Figure 28-3. Circuit Connection Example When UARTA0/CSIB0/CSIB3 Is Used for Communication Interface
QB-MINI2 V850ES/JG3
GND
V DD
V DD
RESET_OUT
RXD/SI
Note 1
VDD
TXD/SO
Note 1
SCK
HS
CLK
FLMD1
Note 2
FLMD0
Note 2
RESET_IN
Note 3
V SS
TXDA0/SOB0/SOB3
V DD
RXDA0/SIB0/SIB3
SCKB0/SCKB3
FLMD1
Reset circuit
FLMD0
Port X
RESET signal
V DD
Note 4
V DD V DD
HS (PCM0)
RESET
MINICUBE2
Notes 1. Connect TXDA0/SOB0/SOB3 (transmit side) of the V850ES/JG3 to RXD/SI (receive side) of the
target connector, and TXD/SO (transmit side) of the target connector to RXDA0/SIB0/SIB3 (receive
side) of the V850ES/JG3.
2. The V850ES/JG3-side pin connected to this pin (FLMD0, FLMD1) can be used as an alternate-
function pin other than while the memory is rewritten during a break in debugging, because this pin is
in a Hi-Z state.
3. This connection is designed assuming that the RESET signal is output from the N-ch open-drain
buffer (output resistance: 100 Ω or less).
4. The circuit enclosed by a dashed line is designed for flash self programming, which controls the
FLMD0 pin via ports. Use the port for inputting or outputting the high level. When flash self
programming is not performed, a pull-down resistance for the FLMD0 pin can be within 1 kΩ to 10
kΩ.
Remark Refer to Table 28-3 for pins used when UARTA0, CSIB0, or CSIB3 is used for communication interface.