Datasheet

V850ES/JG3 CHAPTER 26 REGULATOR
R01UH0015EJ0300 Rev.3.00 Page 719 of 870
Sep 30, 2010
CHAPTER 26 REGULATOR
26.1 Overview
The V850ES/JG3 includes a regulator to reduce power consumption and noise.
This regulator supplies a stepped-down V
DD power supply voltage to the oscillator block and internal logic circuits
(except the A/D converter, D/A converter, and output buffers). The regulator output voltage is set to 2.5 V (TYP.).
Figure 26-1. Regulator
EVDD
AVREF0
AVREF1
FLMD0
V
DD
EVDD
REGC
Bidirectional level shifter
EV
DD I/O buffer
Regulator
A/D converter
D/A converter
Flash
memory
Main
oscillator
Internal digital circuits
2.5 V (TYP.)
Sub-oscillator
Caution Use the regulator with a setting of V
DD = EVDD = AVREF0 = AVREF1.