Datasheet

V850ES/JG3 CHAPTER 3 CPU FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 57 of 870
Sep 30, 2010
3.4.7 Special registers
Special registers are registers that are protected from being written with illegal data due to a program hang-up. The
V850ES/JG3 has the following eight special registers.
• Power save control register (PSC)
• Clock control register (CKC)
• Processor clock control register (PCC)
• Clock monitor mode register (CLM)
• Reset source flag register (RESF)
• Low-voltage detection register (LVIM)
• Internal RAM data status register (RAMS)
• On-chip debug mode register (OCDM)
In addition, the PRCDM register is provided to protect against a write access to the special registers so that the
application system does not inadvertently stop due to a program hang-up. A write access to the special registers is made
in a specific sequence, and an illegal store operation is reported to the SYS register.