Datasheet

V850ES/JG3 CHAPTER 24 LOW-VOLTAGE DETECTOR (LVI)
R01UH0015EJ0300 Rev.3.00 Page 711 of 870
Sep 30, 2010
24.4.2 To use for interrupt
<To start operation>
<1> Mask the interrupt of LVI.
<2> Select the voltage to be detected by using the LVIS.LVIS0 bit.
<3> Set the LVIM.LVION bit to 1 (to enable operation).
<4> Insert a wait cycle of 0.2 ms (max.) or more by software.
<5> By using the LVIM.LVIF bit, check if the supply voltage > detected voltage.
<6> Clear the interrupt request flag of LVI.
<7> Unmask the interrupt of LVI.
<To stop operation>
Clear the LVION bit to 0.
Figure 24-3. Operation Timing of Low-Voltage Detector (LVIMD Bit = 0)
External RESET IC
detected voltage
RESET pin
INTLVI signal
Supply voltage (V DD )
LVI detected voltage
(2.95 V (TYP.))
LVION bit
LVI detected signal
Internal reset signal
(active low)
Delay
Clear
Delay
Time
Delay
Note
Note Since the LVION bit is the initial value (operation disabled) due to the external reset input, no INTLVI
interrupts occur.
Caution When the INTLVI signal is generated, confirm, using the LVIM/LVIF bit, whether the INTLVI signal
is generated due to a supply voltage drop or rise across the detected voltage.