Datasheet

V850ES/JG3 CHAPTER 21 STANDBY FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 683 of 870
Sep 30, 2010
Table 21-6. Operation After Releasing IDLE2 Mode by Interrupt Request Signal
Release Source Interrupt Enabled (EI) Status Interrupt Disabled (DI) Status
Non-maskable interrupt request
signal
Execution branches to the handler address after securing the prescribed setup time.
Maskable interrupt request signal Execution branches to the handler address
or the next instruction is executed after
securing the prescribed setup time.
The next instruction is executed after
securing the prescribed setup time.
(2) Releasing IDLE2 mode by reset
The same operation as the normal reset operation is performed.
Table 21-7. Operating Status in IDLE2 Mode
Setting of IDLE2 Mode Operating Status
Item When Subclock Is Not Used When Subclock Is Used
Main clock oscillator Oscillation enabled
Subclock oscillator
−
Oscillation enabled
Internal oscillator Oscillation enabled
PLL Stops operation
CPU Stops operation
DMA Stops operation
Interrupt controller Stops operation (but standby mode release is possible)
Timer P (TMP0 to TMP5) Stops operation
Timer Q (TMQ0) Stops operation
Timer M (TMM0) Operable when fR/8 is selected as the
count clock
Operable when fR/8 or fXT is selected as
the count clock
Watch timer Operable when fX (divided BRG) is
selected as the count clock
Operable
Watchdog timer 2 Operable when fR is selected as the
count clock
Operable when fR or fXT is selected as
the count clock
CSIB0 to CSIB4 Operable when the SCKBn input clock is selected as the count clock (n = 0 to 4)
I
2
C00 to I
2
C02 Stops operation
Serial interface
UARTA0 to UARTA2 Stops operation (but UARTA0 is operable when the ASCKA0 input clock is selected)
A/D converter Holds operation (conversion result held)
Note
D/A converter Holds operation (output held
Note
)
Real-time output function (RTO) Stops operation (output held)
Key interrupt function (KR) Operable
CRC operation circuit Stops operation
External bus interface See 2.2 Pin States.
Port function Retains status before IDLE2 mode was set
Internal data The CPU registers, statuses, data, and all other internal data such as the contents of
the internal RAM are retained as they were before the IDLE2 mode was set.
Note To realize low power consumption, stop the A/D converter and D/A converter before shifting to the IDLE2 mode.