Datasheet

V850ES/JG3 CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 664 of 870
Sep 30, 2010
19.6 External Interrupt Request Input Pins (NMI and INTP0 to INTP7)
19.6.1 Noise elimination
(1) Eliminating noise on NMI pin
The NMI pin has an internal noise elimination circuit that uses analog delay. Therefore, the input level of the NMI
pin is not detected as an edge unless it is maintained for a specific time or longer. Therefore, an edge is detected
after specific time.
The NMI pin can be used to release the STOP mode. In the STOP mode, noise is not eliminated by using the
system clock because the internal system clock is stopped.
(2) Eliminating noise on INTP0 to INTP7 pins
The INTP0 to INTP7 pins have an internal noise elimination circuit that uses analog delay. Therefore, the input
level of the NMI pin is not detected as an edge unless it is maintained for a specific time or longer. Therefore, an
edge is detected after specific time.
19.6.2 Edge detection
The valid edge of each of the NMI and INTP0 to INTP7 pins can be selected from the following four.
• Rising edge
• Falling edge
• Both rising and falling edges
• No edge detected
The edge of the NMI pin is not detected after reset. Therefore, the interrupt request signal is not acknowledged unless
a valid edge is enabled by using the INTF0 and INTR0 register (the NMI pin functions as a normal port pin).