Datasheet

V850ES/JG3 CHAPTER 19 INTERRUPT/EXCEPTION PROCESSING FUNCTION
R01UH0015EJ0300 Rev.3.00 Page 636 of 870
Sep 30, 2010
Table 19-1. Interrupt Source List (1/2)
Type Classification Default
Priority
Name Trigger Generating
Unit
Exception
Code
Handler
Address
Restored
PC
Interrupt
Control
Register
Reset Interrupt − RESET RESET pin input
Reset by internal source
RESET 0000H 00000000H Undefined −
− NMI NMI pin valid edge input Pin 0010H 00000010H nextPC − Non-
maskable
Interrupt
− INTWDT2 WDT2 overflow WDT2 0020H 00000020H
Note 1
−
−
TRAP0n
Note 2
TRAP instruction −
004nH
Note 2
00000040H nextPC − Software
exception
Exception
−
TRAP1n
Note 2
TRAP instruction −
005nH
Note 2
00000050H nextPC −
Exception
trap
Exception − ILGOP/
DBG0
Illegal opcode/DBTRAP instruction − 0060H 00000060H nextPC −
0 INTLVI Low-voltage detection POCLVI 0080H 00000080H nextPC LVIIC
1 INTP0 External interrupt pin input edge
detection (INTP0)
Pin 0090H 00000090H nextPC PIC0
2 INTP1 External interrupt pin input edge
detection (INTP1)
Pin 00A0H 000000A0H nextPC PIC1
3 INTP2 External interrupt pin input edge
detection (INTP2)
Pin 00B0H 000000B0H nextPC PIC2
4 INTP3 External interrupt pin input edge
detection (INTP3)
Pin 00C0H 000000C0H nextPC PIC3
5 INTP4 External interrupt pin input edge
detection (INTP4)
Pin 00D0H 000000D0H nextPC PIC4
6 INTP5 External interrupt pin input edge
detection (INTP5)
Pin 00E0H 000000E0H nextPC PIC5
7 INTP6 External interrupt pin input edge
detection (INTP6)
Pin 00F0H 000000F0H nextPC PIC6
8 INTP7 External interrupt pin input edge
detection (INTP7)
Pin 0100H 00000100H nextPC PIC7
9 INTTQ0OV TMQ0 overflow TMQ0 0110H 00000110H nextPC TQ0OVIC
10 INTTQ0CC0 TMQ0 capture 0/compare 0 match TMQ0 0120H 00000120H nextPC TQ0CCIC0
11 INTTQ0CC1 TMQ0 capture 1/compare 1 match TMQ0 0130H 00000130H nextPC TQ0CCIC1
12 INTTQ0CC2 TMQ0 capture 2/compare 2 match TMQ0 0140H 00000140H nextPC TQ0CCIC2
13 INTTQ0CC3 TMQ0 capture 3/compare 3 match TMQ0 0150H 00000150H nextPC TQ0CCIC3
14 INTTP0OV TMP0 overflow TMP0 0160H 00000160H nextPC TP0OVIC
15 INTTP0CC0 TMP0 capture 0/compare 0 match TMP0 0170H 00000170H nextPC TP0CCIC0
16 INTTP0CC1 TMP0 capture 1/compare 1 match TMP0 0180H 00000180H nextPC TP0CCIC1
17 INTTP1OV TMP1 overflow TMP1 0190H 00000190H nextPC TP1OVIC
18 INTTP1CC0 TMP1 capture 0/compare 0 match TMP1 01A0H 000001A0H nextPC TP1CCIC0
19 INTTP1CC1 TMP1 capture 1/compare 1 match TMP1 01B0H 000001B0H nextPC TP1CCIC1
20 INTTP2OV TMP2 overflow TMP2 01C0H 000001C0H nextPC TP2OVIC
21 INTTP2CC0 TMP2 capture 0/compare 0 match TMP2 01D0H 000001D0H nextPC TP2CCIC0
22 INTTP2CC1 TMP2 capture 1/compare 1 match TMP2 01E0H 000001E0H nextPC TP2CCIC1
23 INTTP3OV TMP3 overflow TMP3 01F0H 000001F0H nextPC TP3OVIC
24 INTTP3CC0 TMP3 capture 0/compare 0 match TMP3 0200H 00000200H nextPC TP3CCIC0
Maskable Interrupt
25 INTTP3CC1 TMP3 capture 1/compare 1 match TMP3 0210H 00000210H nextPC TP3CCIC1
Notes 1. For the restoring in the case of INTWDT2, see 19.2.2 (2) From INTWDT2 signal.
2. n = 0 to FH