Datasheet

V850ES/JG3 CHAPTER 18 DMA FUNCTION (DMA CONTROLLER)
R01UH0015EJ0300 Rev.3.00 Page 621 of 870
Sep 30, 2010
Table 18-1. DMA Start Factors (2/2)
IFCn5 IFCn4 IFCn3 IFCn2 IFCn1 IFCn0 Interrupt Source
1 0 1 0 1 1 INTUA2T
1 0 1 1 0 0 INTAD
1 0 1 1 0 1 INTKR
Other than above Setting prohibited
Remark n = 0 to 3
18.4 Transfer Targets
Table 18-2 shows the relationship between the transfer targets (√: Transfer enabled, ×: Transfer disabled).
Table 18-2. Relationship Between Transfer Targets
Transfer Destination
Internal ROM On-Chip
Peripheral I/O
Internal RAM External Memory
On-chip peripheral I/O
× √ √ √
Internal RAM
× √ × √
External memory
× √ √ √
Source
Internal ROM
× × × ×
Caution The operation is not guaranteed for combinations of transfer destination and source marked with
“ד in Table 18-2.