Datasheet

V850ES/JG3 CHAPTER 17 I
2
C BUS
R01UH0015EJ0300 Rev.3.00 Page 610 of 870
Sep 30, 2010
Figure 17-24. Example of Slave to Master Communication
(When 8-Clock Wait for Master and 9-Clock Wait for Slave Are Selected) (2/3)
(b) Data
IICn
ACKDn
STDn
SPDn
WTIMn
H
H
H
L
L
L
L
L
L
L
H
H
L
L
L
L
L
ACKEn
MSTSn
STTn
SPTn
WRELn
INTIICn
TRCn
IICn
ACKDn
STDn
SPDn
WTIMn
ACKEn
MSTSn
STTn
SPTn
WRELn
INTIICn
TRCn
SCL0n
SDA0n
Processing by master device
Transfer lines
Processing by slave device
1
89
23456789
321
D7
D0 ACK
D6 D5 D4 D3 D2 D1 D0 ACK
D5D6D7
Note Note
Receive
Transmit
IICn
← data IICn ← data
IICn
← FFH Note IICn ← FFH Note
Note To cancel master wait, write FFH to IICn or set WRELn.
Remark n = 0 to 2