Datasheet

V850ES/JG3 CHAPTER 17 I
2
C BUS
R01UH0015EJ0300 Rev.3.00 Page 601 of 870
Sep 30, 2010
Figure 17-19. Master Operation in Multimaster System (3/3)
Write IICn
WTIMn = 1
WRELn = 1
Read IICn
ACKEn = 1
WTIMn = 0
WTIMn = WRELn = 1
ACKEn = 0
Write IICn
Yes
TRCn = 1?
Restarted?
MSTSn = 1?
Communication start
(address, transfer direction specification)
Transmission start
No
Yes
Waiting for data
transmission
Reception start
Yes
No
INTIICn
interrupt occurred?
Yes
No
Transfer completed?
Waiting for ACK detection
Yes
No
INTIICn
interrupt occurred?
Waiting for data transmission
Not in communication
Yes
No
INTIICn
interrupt occurred?
No
Yes
ACKDn = 1?
No
Yes
No
C
2
Yes
MSTSn = 1?
No
Yes
Transfer completed?
No
Yes
ACKDn = 1?
No
2
Yes
MSTSn = 1?
No
2
Waiting for ACK detection
Yes
No
INTIICn
interrupt occurred?
Yes
MSTSn = 1?
No
C
2
Yes
EXCn = 1 or COIn = 1?
No
1
2
SPTn = 1
STTn = 1
Slave operation
END
Communication processing
Communication processing
Remarks 1. Conform the transmission and reception formats to the specifications of the product in communication.
2. When using the V850ES/JG3 as the master in the multimaster system, read the IICSn.MSTSn bit for
each INTIICn interrupt occurrence to confirm the arbitration result.
3. When using the V850ES/JG3 as the slave in the multimaster system, confirm the status using the
IICSn and IICFn registers for each INTIICn interrupt occurrence to determine the next processing.
4. n = 0 to 2