Datasheet

V850ES/JG3 CHAPTER 17 I
2
C BUS
R01UH0015EJ0300 Rev.3.00 Page 578 of 870
Sep 30, 2010
(2) When arbitration loss occurs during transmission of extension code
<1> When WTIMn bit = 0
ST AD6 to AD0 R/W ACK D7 to D0 ACK D7 to D0 ACK SP
S1 S2 S3 Δ4
S1: IICSn register = 0110X010B (Example: When ALDn bit is read during interrupt servicing)
S2: IICSn register = 0010X000B
S3: IICSn register = 0010X000B
Δ 4: IICSn register = 00000001B
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2
<2> When WTIMn bit = 1
ST AD6 to AD0 R/W ACK D7 to D0 ACK D7 to D0 ACK SP
S1 S2 S3 S4 Δ5
S1: IICSn register = 0110X010B (Example: When ALDn bit is read during interrupt servicing)
S2: IICSn register = 0010X110B
S3: IICSn register = 0010X100B
S4: IICSn register = 0010XX00B
Δ 5: IICSn register = 00000001B
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2