Datasheet

V850ES/JG3 CHAPTER 17 I
2
C BUS
R01UH0015EJ0300 Rev.3.00 Page 571 of 870
Sep 30, 2010
(3) Start ~ Address ~ Data ~ Start ~ Code ~ Data ~ Stop
<1> When WTIMn bit = 0 (after restart, extension code reception)
ST AD6 to AD0 R/W ACK D7 to D0 ACK ST AD6 to AD0 R/W ACK D7 to D0 ACK SP
S1 S2 S3 S4 Δ5
S1: IICSn register = 0001X110B
S2: IICSn register = 0001X000B
S3: IICSn register = 0010X010B
S4: IICSn register = 0010X000B
Δ 5: IICSn register = 00000001B
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2
<2> When WTIMn bit = 1 (after restart, extension code reception)
ST AD6 to AD0 R/W ACK D7 to D0 ACK ST AD6 to AD0 R/W ACK D7 to D0 ACK SP
S1 S2 S3 S4 S5 Δ6
S1: IICSn register = 0001X110B
S2: IICSn register = 0001XX00B
S3: IICSn register = 0010X010B
S4: IICSn register = 0010X110B
S5: IICSn register = 0010XX00B
Δ 6: IICSn register = 00000001B
Remarks 1. S: Always generated
Δ: Generated only when SPIEn bit = 1
X: don’t care
2. n = 0 to 2